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| Worlds First LSI Incorporating Two-Channel Simultaneous DAB Audio Reproduction The MN66720UC DAB Baseband Processor Featuring Low Power Consumption Overview The MN66720UC is a single chip LSI device that implements all analogue and digital processing functions necessary to completely decode any DAB signal conforming to the ETS300401 standard. This device features comprehensive power management functions, making it ideal for a wide range of portable receivers as well and mains powered domestic appliances and in-car receivers. 16.000.20 14.000.10 75 76 51 50 Unit: mm (1.00) 26 0.10 M Features 100 1 25 Single-chip CMOS device implementing all decoder functions (1.00) (1.00) 0.200.05 0.50 from analogue IF input through to audio and data service extraction and decoding 0.10 On-chip MP2 audio decoder capable of decoding two audio 0 to 10 0.500.20 SEATING PLANE services simultaneously from the same multiplex, plus an on-chip program- mable digital audio mixer. This is ideal for sophisticated overlay of announcement services over audio services, and for LQFP100-P-1414 simultaneous recording of one service while listening to another Modes of operation include standby, power-saving or full multiplex decoding with an industry-leading power consumption of around 150 mW (70 % less than Panasonics 1st generation DAB technology) On-chip embedded DRAM for de-interleaving Support for all DAB Modes I, II, III and IV Complete decoding of the full DAB multiplex up to 1.8432 Mbps for Main Service Channels On-chip ADC for direct input of the analog IF signal at 2.048 MHz On-chip decoding of PAD data streams of up to 64 kbps via the host CPU interface On-chip support for sub-channel reconfiguration with no interruption to audio services. Service reconfiguration is fully implemented with minor external CPU support, also ensuring no audio service interruptions On-chip packet filter, capable of extracting one raw data stream or two service+packet address streams directly On-chip AFC, enabling designers to produce low-cost designs without an external VCXO On-chip external data interface, enabling designers to extract any data from the DAB multiplex directly without having to use the RDI protocol Low host CPU overhead through a high level of on-chip intelligence and connection via a simple synchronous serial interface, allowing direct interfacing to a wide range of host MPUs including low cost 8-bit and 16-bit devices On-chip interfaces for RDI, SP/DIF and direct data output Automatic Symbol Selection System (ASSS) enables the highest level of power management for DAB receivers, including facilities for managing HF tuner power consumption Operating Frequency of 24.576 MHz Supply voltage of 3.3 V (I/O and Analog), 2.5 V (on-chip DRAM) and 2.5 V or 1.8 V (internal logic) 100-pin LQFP package 1.400.10 1.70 max 14.000.10 16.000.20 Applications Portable battery-powered receivers; in-car automotive receivers; HiFi or other domestic receivers Products and specifications are subject to change without notice. Please ask for the latest Product Standards to guarantee the satisfaction of your product requirements. 1 Kotari-yakemachi, Nagaokakyo, Kyoto 617-8520, Japan M00501BE Tel. +81-75-951-8151 http://www.panasonic.co.jp/semicon/ New publication, effective from 22 Aug. 2002 0.100.10 0.150.05 Block Diagram |
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